Senior Functional Verification Engineer - Hybrid (3-2)

Our client is a global semiconductor company designing embedded processing solutions for the automotive, industrial, infrastructure and IoT markets, with more than 20,000 employees across 30+ countries. The role exists because the local verification team, part of a wider European group spanning Greece and the Netherlands is growing and needs a senior technical lead to help scale it.

The Role

You'll take technical ownership of functional verification for SoC projects covering communications, Wi-Fi and Bluetooth. In your first six months, you'll help build out a growing verification bench and establish UVM-based practices the team can scale to 4-6 engineers, while collaborating closely with sister teams. You'll mentor junior engineers as they join and act as a technical go-to for verification questions across the wider international organization.

Key Responsibilities

• Architect and independently build UVM-based verification environments and test plans for complex SoC/IC blocks, from specification through to full functional and code coverage closure.
• Apply constrained-random testing and assertion-based verification (SVA), complementing the team's formal verification work with strong functional verification ownership.
• Review design specifications early to improve their clarity and "fitness for verification," partnering closely with architecture, design and software teams.
• Mentor and technically guide junior verification engineers as the team grows, and act as a verification resource for sister teams beyond Greece and the Netherlands.

What You'll Bring

• 5+  years of hands-on experience in ASIC/IC hardware digital verification.
• Strong, demonstrated command of SystemVerilog and UVM, including independently setting up testbenches from scratch.
• Experience with industry-standard simulation and verification management tools (e.g. Cadence Xcelium, eManager/vManager).
• Fluent English (written and verbal), with the confidence to guide technical decisions across international teams.

Nice to Have

• Formal verification experience alongside functional verification.
• VHDL exposure.
• Previous mentoring or informal technical-lead experience.

What's in it for You

€3,500 – €4,600 Gross / Month commensurate with experience, plus additional time off, private health and life insurance, and meal vouchers. Hybrid (3-2) working based in Kallithea, with the opportunity to help shape and grow a verification team from the ground up.